1. Field of the Invention
The present invention relates to a display device and more particularly relates to a display device that conducts a display operation using a display area including at least more than one pixel.
2. Description of the Related Art
A color display device such as a color TV monitor or a color display monitor represents colors usually by adding together the three primary colors of RGB, namely, red (R), green (G) and blue (b). Thus, each display unit of a color display device (which will be referred to herein as a “color display pixel”) has red, green and blue pixels for these three primary colors of RGB. By controlling the luminances of these red, green and blue pixels into desired values, a variety of colors can be represented.
The luminances of the respective pixels vary within the range from the one corresponding to their lowest grayscale (e.g., grayscale #0) through the one corresponding to their highest grayscale (e.g., grayscale #255). The luminance of the pixels corresponding to their lowest grayscale will be represented herein by 0.0, while that of the pixels corresponding to their highest one will be represented herein by 1.0 for convenience sake. The relation between the pixels' grayscales and luminances may be represented by a gamma curve with γ=2.2, for example.
If in a certain display unit, all of its pixels, namely, the red, green and blue pixels, have a luminance of 0.0, the color represented by that display unit is black. Conversely, if all of those pixels have a luminance of 1.0, the color represented by that pixel is white.
Besides such display devices that use the three primary colors of RGB, display devices that conduct a display operation using four or more colors have also been proposed to increase the luminances and to expand the color representation range (see Japanese Patent Application Laid-Open Publication No. 2005-62869, for example). The display device disclosed in that document is a liquid crystal display device that performs a color display operation in not just red, green and blue but also white.
Recently, various types of thin color display devices such as liquid crystal displays and organic EL displays have been developed rapidly. In those display devices, pixels are driven by a simple-matrix addressing or active-matrix addressing method. To ensure even higher quality in conducting a color display operation, the active-matrix addressing method, which will achieve a higher contrast with the residual image reduced, is preferably adopted.
FIG. 13 is a plan view illustrating a part of the active-matrix substrate of an active-matrix-addressed color display device as viewed perpendicularly to the substrate. In this example, the color display device is an active-matrix-addressed liquid crystal display (LCD). This LCD adopts a normally white mode (that makes a white display when no voltage is applied to its liquid crystal layer) as its mode of operation.
As shown in FIG. 13, in this LCD 100, scan lines (gate lines) 102 and signal lines (data lines) 104 are arranged so as to intersect with each other on a TFT (thin-film transistor) substrate 101, and a pixel electrode 106 is arranged in each of multiple regions surrounded by the scan lines 102 and signal lines 104. Each of those pixel electrodes 106 is provided for its associated pixel 108. And a number of those pixels 108 that are arranged to define a matrix pattern form the display area of the LCD. In this description, a region surrounded with the respective centerlines of two adjacent scan lines and those of two adjacent signal lines will be referred to herein as a “pixel”.
FIG. 14 illustrates a configuration for an arbitrary pixel 108A in the display area. Over the active-matrix substrate 101, arranged is a color filter substrate 116 including a counter electrode 112 and color filters 114. A liquid crystal layer 110 is interposed between these two substrates 101 and 116. In each pixel, the orientations of liquid crystal molecules are controlled based on the potential difference between the pixel electrode 106A of the pixel 108A and the counter electrode 112, thus varying the optical transmittance of that pixel and conducting a color display operation. The color filter substrate 116 further includes a black matrix (BM) 118 to cut off the light that is going to leak. The BM has an aperture 119A over the pixel electrode 106A. The light transmitting area of the pixel 108A is obtained by subtracting the sum of the opaque areas, defined by the lines on the TFT substrate, from the area of the aperture 119A.
A TFT 120A is provided as a switching element for the pixel 108A. The TFT 120A has its gate 122A, source 124A and drain 126A electrically connected to the scan line 102, the signal line 104A and the pixel electrode 106A, respectively. As shown in FIG. 14, in the next pixel 108B located on the right-hand side of, and on the same row as, the pixel 108A to form the next stage, the TFT 120B has its gate 122B, source 124B and drain 126B electrically connected to the scan line 102A, the signal line 104B and the pixel electrode 106B, respectively.
In an LCD that conducts a color display operation using the three primary colors of RGB, each set of red, green and blue pixels are arranged continuously along a gate line, for example, to form a single display unit. On the other hand, in an LCD that conducts a color display operation using the four colors of RGBW, each set of red, green, blue and white pixels are arranged continuously along a gate line, for example, to form a single display unit.
A parasitic capacitor Csd1 is formed between the signal line 104A connected to the source 124A of the TFT 120A and the pixel electrode 106A. Meanwhile, another parasitic capacitor Csd2 is formed between the signal line 104B connected to the pixel electrode 106B of the pixel 108B, which is located next to the pixel 108A, and the pixel electrode 106A.
In presenting an image on the LCD 100, a scan signal and a display signal are supplied to the scan lines 102 and the signal lines 104 by a line inversion drive technique, for example. The display signal is supplied by a frame inversion drive technique, by which the polarity inverts one frame after another.
FIG. 15 shows how the display signal inverts its polarity according to the line inversion drive technique. As shown in FIG. 15, within one frame, positive and negative voltages are alternately applied to the pixel electrodes on one row of pixels after another. That is to say, if a positive voltage has been applied to each pixel electrode on a certain row of pixels, then a negative voltage is applied to each pixel electrode (on the next stage) on the next row of pixels.
FIG. 16 shows the waveform of a voltage (i.e., TFT's drain potential) applied to a pixel electrode (e.g., the pixel electrode 106A shown in FIG. 14) in a situation where the line inversion drive technique is adopted. As shown in FIG. 16, when a gate potential Vg is applied to the TFT 120A of the pixel 108A, its gate 122A is turned ON. As a result, the source 124A and the drain 126A of the TFT 120A gets electrically continuous, thus raising the drain potential Vd to the vicinity of a source potential Vs. When the gate 122A is turned OFF after that, the drain potential Vd to maintain decreases by a feedthrough voltage ΔVd. In this case, the feedthrough voltage ΔVd is calculated by the following equation:ΔVd=Cgd/(Cgd+Clc+Ccs+Csd)×Vgpp 
where Cgd is gate-drain capacitance, Clc is liquid crystal capacitance, Ccs is storage capacitance and Vgpp is the difference between the maximum and minimum values of the gate voltage.
Thereafter, the drain potential Vd is affected by the parasitic capacitors Csd1 and Csd2 to further change by ΔVsd, which is given by the following equation:ΔVsd=Csd/(Cgd+Clc+Ccs+Csd)×ΔVs 
where ΔVs is a variation in signal voltage.
When a display operation is performed by the line inversion drive, potentials of the same polarity are applied to the pixel electrodes 106A and 106B, and therefore, the parasitic capacitances Csd1 and Csd2 do not cancel each other but both cause a variation in the drain potential Vd. Particularly if a display operation is performed in upper and lower portions of the display area over and under the pixel 108A at higher grayscales than in the pixel 108A, then the drain potential Vd comes to have an increased effective value during one frame (F) of the image in the pixel electrode 106A of the pixel 108A. As a result, a so-called “shadowing phenomenon” occurs on the monitor screen.
FIG. 17 illustrates how shadowing occurs in a normally white mode. Specifically, FIG. 17 illustrates a monitor screen on which a black rectangle (region A) is presented at the center of the display area of the LCD 100. Regions B are the upper and lower portions of the display area that are located over and under the region A. It should be noted that in FIG. 15, the vertical direction on the paper corresponds to the vertical direction on the screen. In these regions B, the image should be presented in a lighter color (e.g., in light gray) than in the region A and the color should be as light as in the other regions C that are located on the right- and left-hand sides of the region A. However, for the reasons described above, the drain potential Vd of the pixels has an increased effective value in the regions B. As a result, the grayscale decreases in the regions B and the image presented in the regions B becomes as if the shadow of the black rectangle presented in the region A were cast in the region B.
The LCD described above is supposed to operate in a normally white mode. However, if the LCD adopted a normally black mode (that performs a black display when no voltages are applied), then the regions located over and under a white display region would have an increased grayscale for the same reasons as the ones described above, thus causing a shadowing phenomenon, too. Generally speaking, according to the line inversion drive technique, such shadowing inevitably happens. Still and all, as the power dissipation could be cut down by supplying an appropriate signal to the scan lines, the line drive inversion is applied to the fields of cell phones and PDAs.
Meanwhile, to eliminate such shadowing, a dot inversion drive technique could be adopted instead of the line inversion drive technique. FIG. 18 illustrates how to perform the dot inversion drive. As shown in FIG. 18, according to the dot inversion drive technique, signal potentials of opposite polarities are supplied to each pair of pixels that are adjacent to each other in the row direction or in the column direction. As a result, the influences of the parasitic capacitances Csd1 and Csd2 on the drain potential will cancel each other and the shadowing phenomenon will rarely happen. That is why the dot inversion drive technique is used extensively in the fields of laptops and TV sets in which the display quality should be given a top priority.
Nevertheless, even if the dot inversion drive technique is adopted, a so-called “interblock variation” will still happen. Specifically, in manufacturing active-matrix substrates for LCDs, TFTs, electrodes, signal lines and other members are fabricated on a glass substrate by multilayer technologies. In the manufacturing process of such active-matrix substrates, sometimes not all of those interconnect patterns are formed over the entire surface of the single glass substrate but some interconnect patterns may be formed on a block-by-block basis by dividing the surface of the glass substrate into a number of blocks and performing a stepper exposure process on one of those blocks after another. In that case, misalignment could occur between the signal lines and the pixel electrodes and the distance between the signal line and the pixel electrode could vary from one block to another on any of the active-matrix substrates completed that way.
And if an LCD were fabricated on such a substrate, then the potentials at the pixel electrodes of multiple pixels that should display the same color could be different from each other between a block with such misalignment and a block with no misalignment or between two blocks with misalignment. As a result, the colors displayed on the monitor screen would have noticeably different grayscales from one block to another, thus causing the “interblock variation” phenomenon. That interblock variation will occur not only in such a display device of the dot inversion drive type but also in a display device of the line inversion drive type. The interblock variation could also be caused due to some local difference in the degree of perfection during the manufacturing process steps of the display device.
To avoid such shadowing or interblock variation, it would be effective to reduce the variation ΔCsd in the parasitic capacitance Csd due to the presence of the parasitic capacitors, misalignment or the local difference in the degree of perfection. If the parasitic capacitance Csd was reduced, however, then the power dissipation would often increase due to a decrease in aperture ratio (or transmittance), a decrease in yield or an increase in the capacitance of signal lines.